1. Field of the Invention
The present invention relates to electronic circuits, and more specifically to a frequency/signal converter and a switching regulator having such a frequency/signal converter.
2. Description of Related Art
In the electronics field, circuits adapted to generate signals that are proportional to the clock frequency of electronic devices are often employed. Typically circuits employing conventional phase-locked loops (PLL) are used. A conventional PLL includes a phase detector of an input signal, a filter, an amplifier, and a voltage controlled oscillator (VCO). When the lock occurs, the VCO control voltage is made proportional to the frequency of the input signal.
Frequency/signal converters can be utilized in other applications such as in switching regulators. These regulators provide a substantially constant output voltage to a load from a fluctuating input voltage, and include a switch, for example a transistor, coupled in series or in parallel with the load and a filter, usually an LC filter. Generally these transistors are driven by circuitry that controls the turning off and the turning on of the transistor through the definition of a duty-cycle (that is, the rate between the time that the switch is on and the total switching time). Such circuitry usually includes an input clock signal derived from an oscillator that fixes the switching time. A control circuit placed in feedback between the output and the input of the regulator makes the output voltage stable against load variances and input voltage fluctuations.
In the case of current mode switching regulators (that is, regulators controlled by a current signal), the control circuitry takes the current flowing through an inductance and compares it with a current derived from a transconductance amplifier that receives the output voltage of the regulator and a voltage reference. The control circuitry acts on the turning on and off circuitry of the transistor. When the duty-cycle exceeds 50%, current mode switching regulators become unstable. For this reason, a slope compensation signal is injected into the current control signal.
One current mode switching regulator is described in U.S. Pat. No. 5,929,620. This switching regulator is synchronized by an external clock signal and includes a PLL circuit that synchronizes the oscillator of its VCO with the external clock signal. The phase locked loop synchronizes the oscillator of the VCO without interfering with a slope compensation signal produced by the same VCO and which is added to the current control signal. However, the PLL circuit is not stable and it is necessary to make it stable by adding a compensation network.